BL31: Use helper function to save registers in SMC handler

Use the helper function `save_gp_registers` to save the register
state to cpu_context on entry to EL3 in SMC handler. This has the
effect of saving x0 - x3 as well into the cpu_context which was
not done previously but it unifies the register save sequence
in BL31.

Change-Id: I5753c942263a5f9178deda3dba896e3220f3dd83
Signed-off-by: Soby Mathew <[email protected]>

diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index 54db6814d542d4a195a35a872ea1aa6fe4c9f68b..77bd63ec083baaebc39f505fa47dd2126986cf34 100644 (file)
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -356,24 +356,8 @@ smc_handler64:
         * We already have x0-x4 in place. x5 will point to a cookie (not used
         * now). x6 will point to the context structure (SP_EL3) and x7 will
         * contain flags we need to pass to the handler.
-        *
-        * Save x4-x29 and sp_el0.
         */
-       stp     x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
-       stp     x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6]
-       stp     x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]
-       stp     x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10]
-       stp     x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12]
-       stp     x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14]
-       stp     x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
-       stp     x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18]
-       stp     x20, x21, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X20]
-       stp     x22, x23, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X22]
-       stp     x24, x25, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X24]
-       stp     x26, x27, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X26]
-       stp     x28, x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X28]
-       mrs     x18, sp_el0
-       str     x18, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_SP_EL0]
+       bl      save_gp_registers
 
        mov     x5, xzr
        mov     x6, sp